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5962-9061102XA | CYPRESS SEMI

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CYPRESS SEMI 5962-9061102XA

CY7C311-25WMB EPLD 25 ns


Ordering Info

In Stock: 0

MOQ: 1

Package Quantity: 1

Quantity Cost
1+ $195.00


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Electrical Characteristics

Additional Feature MACROCELLS INTERCONNECTED BY PIA; 32 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Architecture PAL-TYPE
Clock Frequency-Max 27
JESD-30 Code R-GDIP-T28
JESD-609 Code e0
Length 37.0205
Number of Dedicated Inputs 7
Number of I/O Lines 16
Number of Inputs 24
Number of Outputs 16
Number of Product Terms 320
Number of Terminals 28
Operating Temperature-Max 125
Operating Temperature-Min -55
Organization 7 DEDICATED INPUTS, 16 I/O
Output Function MACROCELL
Package Body Material CERAMIC, GLASS-SEALED
Package Code WDIP
Package Equivalence Code DIP28,.3
Package Shape RECTANGULAR
Package Style IN-LINE, WINDOW
Peak Reflow Temperature (Cel) NOT SPECIFIED
Power Supplies 5
Programmable Logic Type UV PLD
Propagation Delay 40
Qualification Status Not Qualified
Screening Level 38535Q/M;38534H;883B
Seated Height-Max 5.08
Sub Category Programmable Logic Devices
Supply Voltage-Max 5.5
Supply Voltage-Min 4.5
Supply Voltage-Nom 4.5
Surface Mount NO
Technology CMOS
Temperature Grade MILITARY
Terminal Finish Tin/Lead (Sn/Pb) - hot dipped
Terminal Form THROUGH-HOLE
Terminal Pitch 2.54
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 7.62