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74AUP2G08DC,125 | NXP

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NXP 74AUP2G08DC,125

AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS,PDSO8


Ordering Info

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MOQ: 1

Package Quantity: 1

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Electrical Characteristics

Family AUP/ULP/V
JESD-30 Code R-PDSO-G8
JESD-609 Code e4
Length 2.3
Logic IC Type AND GATE
Moisture Sensitivity Level 1
Number of Functions 2
Number of Inputs 2
Number of Terminals 8
Operating Temperature-Max 125
Operating Temperature-Min -40
Package Body Material PLASTIC/EPOXY
Package Code VSSOP
Package Shape RECTANGULAR
Package Style SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Cel) 260
Propagation Delay (tpd) 24
Seated Height-Max 1
Supply Voltage-Max (Vsup) 3.6
Supply Voltage-Min (Vsup) 0.8
Supply Voltage-Nom (Vsup) 1.1
Surface Mount YES
Technology CMOS
Temperature Grade AUTOMOTIVE
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Form GULL WING
Terminal Pitch 0.5
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 2