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74LV138D,118 | NXP

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NXP 74LV138D,118

Decoder/Driver, LV/LV-A/LVX/HSeries,InvertedOutput, CMOS, PDSO16


RoHS Compliant

Ordering Info

In Stock: 0

MOQ: 2500

Package Quantity: 2500

Quantity Cost
2500 -

Electrical Characteristics

Additional Feature 3 ENABLE INPUTS
Family LV/LV-A/LVX/H
Input Conditioning STANDARD
JESD-30 Code R-PDSO-G16
JESD-609 Code e4
Length 9.9
Load Capacitance (CL) 50
Logic IC Type OTHER DECODER/DRIVER
Moisture Sensitivity Level 1
Number of Functions 1
Number of Terminals 16
Operating Temperature-Max 125
Operating Temperature-Min -40
Output Polarity INVERTED
Package Body Material PLASTIC/EPOXY
Package Code SOP
Package Shape RECTANGULAR
Package Style SMALL OUTLINE
Peak Reflow Temperature (Cel) 260
Propagation Delay (tpd) 32
Qualification Status Not Qualified
Seated Height-Max 1.75
Supply Voltage-Max (Vsup) 5.5
Supply Voltage-Min (Vsup) 1
Supply Voltage-Nom (Vsup) 3.3
Surface Mount YES
Technology CMOS
Temperature Grade AUTOMOTIVE
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Form GULL WING
Terminal Pitch 1.27
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 3.9