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74LVC1G74DP,125 | NEXPERIA

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NEXPERIA 74LVC1G74DP,125

74LVC Series 5.5 V SMT Single D-Type Flip-Flop; Postive Edge Trigger - TSSOP-8


Ordering Info

In Stock: 0

MOQ: 3000

Package Quantity: 3000

HTS Code: 8542.39.00

ECCN: EAR99

COO: CN

Subject to tariff fees.

Quantity Cost
3000 -

Electrical Characteristics

Family LVC/LCX/Z
JESD-30 Code S-PDSO-G8
JESD-609 Code e4
Length 3
Logic IC Type D FLIP-FLOP
Moisture Sensitivity Level 1
Number of Bits 1
Number of Functions 1
Number of Terminals 8
Operating Temperature-Max 125
Operating Temperature-Min -40
Output Polarity COMPLEMENTARY
Package Body Material PLASTIC/EPOXY
Package Code TSSOP
Package Shape SQUARE
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Cel) 260
Propagation Delay (tpd) 13.4
Qualification Status Not Qualified
Seated Height-Max 1.1
Supply Voltage-Max (Vsup) 5.5
Supply Voltage-Min (Vsup) 1.65
Supply Voltage-Nom (Vsup) 1.8
Surface Mount YES
Technology CMOS
Temperature Grade AUTOMOTIVE
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Form GULL WING
Terminal Pitch 0.65
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 30
Trigger Type POSITIVE EDGE
Width 3
fmax-Min 200