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74LVC2G240DC,125 | NEXPERIA

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NEXPERIA 74LVC2G240DC,125

74LVC Series 5.5 V 3-State Dual Inverting Buffer/Line Driver SMT - VSSOP-8


RoHS Compliant

Ordering Info

In Stock: 0

MOQ: 3000

Package Quantity: 3000

Quantity Cost
3000 -

Electrical Characteristics

Family LVC/LCX/Z
JESD-30 Code R-PDSO-G8
JESD-609 Code e4
Length 2.3
Logic IC Type BUS DRIVER
Moisture Sensitivity Level 1
Number of Bits 1
Number of Functions 2
Number of Ports 2
Number of Terminals 8
Operating Temperature-Max 125
Operating Temperature-Min -40
Output Characteristics 3-STATE
Output Polarity INVERTED
Package Body Material PLASTIC/EPOXY
Package Code VSSOP
Package Shape RECTANGULAR
Package Style SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Cel) 260
Propagation Delay (tpd) 11.9
Qualification Status Not Qualified
Seated Height-Max 1
Supply Voltage-Max (Vsup) 5.5
Supply Voltage-Min (Vsup) 1.65
Supply Voltage-Nom (Vsup) 2.7
Surface Mount YES
Technology CMOS
Temperature Grade AUTOMOTIVE
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Form GULL WING
Terminal Pitch .5
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 2