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74LVQ74SCX | NATIONAL SEMICONDUCTOR

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NATIONAL SEMICONDUCTOR 74LVQ74SCX

LVQ SERIES, DUAL POSITIVE EDGE TRIGGEREDDFLIP-FLOP,COMPLEMENTARY OUTPUT, PDSO14


Ordering Info

In Stock: 2500

MOQ: 1

Package Quantity: 1

Quantity Cost
1 -

Electrical Characteristics

Family LVQ
JESD-30 Code R-PDSO-G14
JESD-609 Code e3
Length 8.65
Load Capacitance (CL) 50
Logic IC Type D FLIP-FLOP
Max Frequency@Nom-Sup 95000000
Max I(ol) 0.012
Moisture Sensitivity Level 1
Number of Bits 1
Number of Functions 2
Number of Terminals 14
Operating Temperature-Max 85
Operating Temperature-Min -40
Output Polarity COMPLEMENTARY
Package Body Material PLASTIC/EPOXY
Package Code SOP
Package Equivalence Code SOP14,.25
Package Shape RECTANGULAR
Package Style SMALL OUTLINE
Packing Method TAPE AND REEL
Peak Reflow Temperature (Cel) 260
Power Supplies 3.3
Prop Delay@Nom-Sup 16
Propagation Delay (tpd) 23
Qualification Status Not Qualified
Seated Height-Max 1.75
Sub Category FF/Latches
Supply Voltage-Max (Vsup) 3.6
Supply Voltage-Min (Vsup) 2
Supply Voltage-Nom (Vsup) 2.7
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 1.27
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Trigger Type POSITIVE EDGE
Width 3.9
fmax-Min 95