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NL17SZ00DFT2G | ON SEMICONDUCTOR

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ON SEMICONDUCTOR NL17SZ00DFT2G

NAND GATE


Ordering Info

In Stock: 2226

MOQ: 1

Package Quantity: 1

Quantity Cost
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Electrical Characteristics

Family LVC/LCX/Z
JESD-30 Code R-PDSO-G5
JESD-609 Code e3
Length 2
Load Capacitance (CL) 50
Logic IC Type NAND GATE
Max I(ol) 0.024
Moisture Sensitivity Level 1
Number of Functions 1
Number of Inputs 2
Number of Terminals 5
Operating Temperature-Max 125
Operating Temperature-Min -55
Package Body Material PLASTIC/EPOXY
Package Code TSSOP
Package Equivalence Code TSSOP5/6,.08
Package Shape RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Packing Method TAPE AND REEL
Peak Reflow Temperature (Cel) 260
Power Supplies 3.3
Prop Delay@Nom-Sup 5.2
Propagation Delay (tpd) 12
Qualification Status Not Qualified
Schmitt Trigger NO
Seated Height-Max 1.1
Sub Category Gates
Supply Voltage-Max (Vsup) 5.5
Supply Voltage-Min (Vsup) 1.65
Supply Voltage-Nom (Vsup) 1.8
Surface Mount YES
Technology CMOS
Temperature Grade MILITARY
Terminal Finish Tin (Sn)
Terminal Form GULL WING
Terminal Pitch 0.65
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 40
Width 1.25