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Learn more about ECAD Model here.Electrical Characteristics
| Additional Feature | 360 FLIP-FLOPS; TYP. GATES = 1500-2000; POWER-DOWN SUPPLY CURRENT = 80UA |
| Clock Frequency-Max | 100 |
| Combinatorial Delay of a CLB-Max | 7 |
| JESD-30 Code | S-PQCC-J68 |
| JESD-609 Code | e0 |
| Length | 24.2316 |
| Moisture Sensitivity Level | 1 |
| Number of CLBs | 100 |
| Number of Equivalent Gates | 1500 |
| Number of Inputs | 58 |
| Number of Logic Cells | 100 |
| Number of Outputs | 58 |
| Number of Terminals | 68 |
| Operating Temperature-Max | 85 |
| Operating Temperature-Min | 0 |
| Organization | 100 CLBS, 1500 GATES |
| Package Body Material | PLASTIC/EPOXY |
| Package Code | QCCJ |
| Package Equivalence Code | LDCC68,1.0SQ |
| Package Shape | SQUARE |
| Package Style | CHIP CARRIER |
| Peak Reflow Temperature (Cel) | 225 |
| Power Supplies | 5 |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Qualification Status | Not Qualified |
| Seated Height-Max | 4.445 |
| Sub Category | Field Programmable Gate Arrays |
| Supply Voltage-Max | 5.25 |
| Supply Voltage-Min | 4.75 |
| Supply Voltage-Nom | 5 |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | OTHER |
| Terminal Finish | TIN LEAD |
| Terminal Form | J BEND |
| Terminal Pitch | 1.27 |
| Terminal Position | QUAD |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Width | 24.2316 |