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Learn more about ECAD Model here.Electrical Characteristics
Additional Feature | MAX USABLE 7500 LOGIC GATES |
Clock Frequency-Max | 270 |
Combinatorial Delay of a CLB-Max | 2.7 |
JESD-30 Code | S-PQFP-G160 |
JESD-609 Code | e0 |
Length | 28 |
Moisture Sensitivity Level | 3 |
Number of CLBs | 484 |
Number of Equivalent Gates | 6500 |
Number of Inputs | 138 |
Number of Logic Cells | 484 |
Number of Outputs | 138 |
Number of Terminals | 160 |
Operating Temperature-Max | 85 |
Operating Temperature-Min | 0 |
Organization | 484 CLBS, 6500 GATES |
Package Body Material | PLASTIC/EPOXY |
Package Code | QFP |
Package Equivalence Code | QFP160,1.2SQ |
Package Shape | SQUARE |
Package Style | FLATPACK |
Peak Reflow Temperature (Cel) | 225 |
Power Supplies | 5 |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
Qualification Status | Not Qualified |
Seated Height-Max | 4.1 |
Sub Category | Field Programmable Gate Arrays |
Supply Voltage-Max | 5.25 |
Supply Voltage-Min | 4.75 |
Supply Voltage-Nom | 5 |
Surface Mount | YES |
Technology | CMOS |
Temperature Grade | OTHER |
Terminal Finish | Tin/Lead (Sn85Pb15) |
Terminal Form | GULL WING |
Terminal Pitch | 0.65 |
Terminal Position | QUAD |
Time@Peak Reflow Temperature-Max (s) | 30 |
Width | 28 |