Manufacturer
CISSOID
HTC KOREA
INFINEON
ON SEMICONDUCTOR
ST MICROELECTRONICS
Adjustability
FIXED
Dropout Voltage1-Max
.3
.35
0.11
0.27
0.4
1.2
1.3
Dropout Voltage1-Nom
.15
0.065
0.19
1.07
1.1
2
IHS ObjectID
1144309692
1144309695
1144309700
1144309703
1144309706
1144309709
1144309712
1144309715
1278442921
1670611005
1822572840
1822572859
1824515435
1824515437
1824515440
1824515442
1824515444
1824515446
1824515448
1824515450
2002218896
2012562460
2019328321
8000724984
8074349995
8150257736
8262729102
Input Voltage Absolute-Max
15
20
35
6
Input Voltage-Max
11.5
13.75
16
22.5
23.3
25
25.5
29
30
45
5.5
6
Input Voltage-Min
1.5
1.7
1.9
10
11
13
14
16
17.5
2.9
3
3.5
4.3
5.5
6
6.5
JESD-30 Code
R-MSFM-T3
R-PDSO-G3
R-PDSO-G4
R-PDSO-G5
R-PSFM-T3
S-PDSO-N4
JESD-609 Code
e3
e4
Length
1
2.9
2.95
3
6.5
Line Regulation-Max
.012
0.001
0.00561
0.01
0.05
Load Regulation-Max
.012
0.0055
0.03
0.045
0.3
Moisture Sensitivity Level
1
Number of Functions
1
Number of Outputs
1
Number of Terminals
3
4
5
Operating Temperature, TJ-Max
125
150
225
85
Operating Temperature, TJ-Min
0
-40
-55
Operating Temperature-Max
85
Operating Temperature-Min
-40
Output Current1-Max
.15
.2
0.03
0.15
0.5
1
1.3
Output Voltage1-Max
1.224
1.53
15.3
15.75
2.563
2.575
3.366
5.1
5.2
Output Voltage1-Min
1.176
1.47
14.25
14.7
2.425
2.438
3.234
4.8
4.9
Output Voltage1-Nom
1.2
1.5
10
12
13
15
2.5
3.3
5
5.5
9
Package Body Material
METAL
PLASTIC/EPOXY
Package Code
HVSON
LSSOP
SOP
TSSOP
Package Equivalence Code
SIP3,.1TB
SOLCC4,.04,25
SOT-223
TSOP5/6,.11,37
Package Shape
RECTANGULAR
SQUARE
Package Style
FLANGE MOUNT
SMALL OUTLINE
SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Packing Method
RAIL
TAPE AND REEL
Peak Reflow Temperature (Cel)
260
NOT SPECIFIED
Qualification Status
Not Qualified
Regulator Type
FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
FIXED POSITIVE SINGLE OUTPUT STANDARD REGULATOR
Seated Height-Max
0.6
1.1
1.45
1.8
1.9
Sub Category
Other Regulators
Surface Mount
NO
YES
Technology
BIPOLAR
CMOS
Terminal Finish
Matte Tin (Sn)
Matte Tin (Sn) - annealed
NICKEL
Nickel/Palladium/Gold (Ni/Pd/Au)
Tin (Sn)
Terminal Form
GULL WING
NO LEAD
THROUGH-HOLE
Terminal Pitch
.95
0.65
0.95
2.3
2.54
Terminal Position
DUAL
SINGLE
Time@Peak Reflow Temperature-Max (s)
30
40
NOT SPECIFIED
Voltage Tolerance-Max
2
2.5
3
5
6.7
Width
1
1.5
1.6
3.5